[
    {
        "id": "thesis:18503",
        "collection": "thesis",
        "collection_id": "18503",
        "cite_using_url": "https://resolver.caltech.edu/CaltechTHESIS:04202026-192826965",
        "primary_object_url": {
            "basename": "David_Catherall_2026_Thesis Final.pdf",
            "content": "final",
            "filesize": 15212776,
            "license": "other",
            "mime_type": "application/pdf",
            "url": "/18503/1/David_Catherall_2026_Thesis Final.pdf",
            "version": "v3.0.0"
        },
        "type": "thesis",
        "title": "Threads in the Tapestry of Next Generation Nanodevices: Simulation and Thin Film Processing",
        "author": [
            {
                "family_name": "Catherall",
                "given_name": "David Spencer",
                "orcid": "0000-0002-3540-2419",
                "clpid": "Catherall-David-Spencer"
            }
        ],
        "thesis_advisor": [
            {
                "family_name": "Minnich",
                "given_name": "Austin J.",
                "orcid": "0000-0002-9671-9540",
                "clpid": "Minnich-A-J"
            }
        ],
        "thesis_committee": [
            {
                "family_name": "Falson",
                "given_name": "Joseph",
                "orcid": "0000-0003-3183-9864",
                "clpid": "Falson-Joseph"
            },
            {
                "family_name": "Fultz",
                "given_name": "Brent T.",
                "orcid": "0000-0002-6364-8782",
                "clpid": "Fultz-B-T"
            },
            {
                "family_name": "Ye",
                "given_name": "Linda",
                "orcid": "0000-0001-7949-1356",
                "clpid": "Ye-Linda"
            },
            {
                "family_name": "Minnich",
                "given_name": "Austin J.",
                "orcid": "0000-0002-9671-9540",
                "clpid": "Minnich-A-J"
            }
        ],
        "local_group": [
            {
                "literal": "div_eng"
            }
        ],
        "abstract": "<p>Modern nanodevices such as silicon integrated circuits and superconducting quantum bits achieve their performance from the intrinsic properties of semiconducting, superconducting, and optical materials. Creating devices with improved performance, as well as creating new types of devices, requires an understanding of the fundamental material properties and the methods to actually grow and process these materials. For instance, in charge transport devices like transistors, phenomena such as hot carrier effects become relevant at the small length scales relevant in modern integrated circuits, necessitating new physical models and understanding during miniaturization. Additionally, as researchers seek to push the limits of device performance by reducing signal losses and by using novel materials, new etching and deposition technologies are needed to prepare ultra-high quality thin film materials to fabricate their devices. To this end, this thesis contains work in three facets of solid-state devices: simulation, etching, and deposition.</p>\r\n\r\n<p>In Chapter 2, we investigate the hot hole transport properties of silicon via a recently developed ab-initio formalism utilizing the Boltzmann transport equation. Hot carrier transport and fluctuations are of critical importance in essentially all modern transistors, and a thorough understanding of the underlying physics is central to their design and operation. In the hot carrier regime, electric fields are sufficiently strong to perturb the electron distribution function such that equilibrium relationships including Ohm's law, the Einstein diffusion relation, and Nyquist noise equation are no longer valid. In this non-equilibrium case, additional microscopic insight may be learned about the material system from the field-dependent mobility, diffusion coefficient, and noise spectrum. Here we develop and apply a first-principles approach to hot carrier transport that does not require any adjustable parameters, facilitating direct comparison to experiment. While this computational method has been applied to electrons in Si and GaAs, we apply it to holes in Si for the first time, calculating the anisotropic DC mobility, diffusion coefficient, and energy relaxation time. Furthermore, we extend the numerical theory underlying the solution to the linearized Boltzmann transport equation to achieve greater accuracy and allow for calculations at cryogenic temperatures. Using this modified theory, we successfully predict experimentally observed phenomena in the cryogenic field-dependent drift velocity and noise spectrum and elucidate their origin from the characteristics of the electron-phonon scattering rates and momentum relaxation time.</p>\r\n\r\n<p>Chapter 3 switches focus of the thesis to nanofabrication techniques for thin films; in this chapter we work with a process called atomic layer etching. Although this technique is practically the reverse of atomic layer deposition, which is now common in nanofabrication, atomic layer etching is only a recent development and still in its infancy. The process utilizes sequential, self-limited steps to modify and remove the surface of a material in a precise and controlled manner. Here we report a new process for etching silicon dioxide (SiO\u2082). This material is common in device fabrication as a dielectric, optical medium, or surface contaminant. Atomic layer etching has the unique properties of smoothing surfaces while exhibiting sub-angstrom precision. To this end, a technique utilizing less-hazardous reactants than prior works and performed using a commercial-scale tool is of interest to improve devices by smoothing SiO\u2082 interfaces. We develop and demonstrate such a process using trimethylaluminum (TMA) and an argon/sulfur hexafluoride/hydrogen (Ar/SF\u2086/H\u2082) plasma mixture, demonstrating the process window, step synergy, saturation curves, process parameter dependence, contamination from precursors, smoothing effect, and the influence of SiO\u2082 deposition method on the etch rate.</p>\r\n\r\n<p>In Chapter 4 we turn from etching to deposition techniques. This chapter focuses on a new physical vapor deposition method denoted thermal laser evaporation (also called thermal laser epitaxy). Physical vapor deposition techniques create thin films by the physical diffusion of material vapors onto a substrate. Common techniques included sputtering, electron beam evaporation, molecular beam epitaxy, and pulsed laser deposition. However, all of these come with various limitations. These limits include maximum process pressures, the use of reactive or fragile crucibles, and the maximum temperature of the deposition source. Thermal laser evaporation is an old technique which has long been neglected owing to the limits of laser technology and associated high cost. However, the recent development of 1070 nm fiber lasers has proven to be an enabling technology for this technique. In this chapter, we report the design and demonstration of a home-built thermal laser evaporation system. The system is among the first to be placed into operation in the modern era. We demonstrate its capabilities by evaporating nickel and perform roughness, compositional, and electrical characterization. We discuss lessons learned during system development and comment on both current and future designs.</p>",
        "doi": "10.7907/bjfx-8519",
        "publication_date": "2026",
        "thesis_type": "phd",
        "thesis_year": "2026"
    }
]