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    url = "https://resolver.caltech.edu/CaltechETD:etd-05032004-153842",
    id = "record",
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    url = "https://resolver.caltech.edu/CaltechTHESIS:03022011-131111881",
    id = "record",
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    url = "https://resolver.caltech.edu/CaltechETD:etd-12072001-160019",
    id = "record",
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    url = "https://resolver.caltech.edu/CaltechETD:etd-10022001-201911",
    id = "record",
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    url = "https://resolver.caltech.edu/CaltechETD:etd-08272001-155016",
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    url = "https://resolver.caltech.edu/CaltechTHESIS:10152010-145548970",
    id = "record",
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    url = "https://resolver.caltech.edu/CaltechETD:etd-08112005-114144",
    id = "record",
    doi = "10.7907/xzwa-p598"
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    year = "1998",
    url = "https://resolver.caltech.edu/CaltechETD:etd-01242008-074143",
    id = "record",
    doi = "10.7907/5ma9-h225"
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    url = "https://resolver.caltech.edu/CaltechETD:etd-01252008-095244",
    id = "record",
    doi = "10.7907/z89g-gm27"
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    url = "https://resolver.caltech.edu/CaltechETD:etd-01092008-085128",
    id = "record",
    doi = "10.7907/96W6-N605"
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    id = "record",
    doi = "10.7907/G620-GG65"
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    url = "https://resolver.caltech.edu/CaltechETD:etd-10162007-093427",
    id = "record",
    doi = "10.7907/SR5V-KT18"
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    id = "record",
    doi = "10.7907/ynt2-nn65"
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    url = "https://resolver.caltech.edu/CaltechETD:etd-10172007-090528",
    id = "record",
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    id = "record",
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    url = "https://resolver.caltech.edu/CaltechTHESIS:09122011-094355148",
    id = "record",
    doi = "10.7907/4bdw-fg34"
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    id = "record",
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    url = "https://resolver.caltech.edu/CaltechETD:etd-07122007-134330",
    id = "record",
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    id = "record",
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    url = "https://resolver.caltech.edu/CaltechTHESIS:03222012-091423469",
    id = "record",
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    id = "record",
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